The objective of this topic is to demonstrate the potentiality of digital approaches to replace traditional analog RF transmitters and enhance integration, configurability, performance and reduce power consumption. In 2008-2009, we demonstrated the first high-speed digital RF transmitter based on delta-sigma modulation able to address 3G communication standards (IEEE JSSC Oct 2009). This has been implemented in a 90nm CMOS process (Fig. 5). The main challenge was the very high sample rates involved for the digital signal processing. We extended the study for addressing a subsequent issue of filtering by introducing multi-stage semi-digital FIR filtering and power combination. A complete transceiver including co-integrated BAW filters has been demonstrated in the frame of the MOBILIS European project (Int. J. RFMiCAE Sep 2011). This work has also led to 2 invited talks in international conferences and 2 book chapters. Other projects include the demonstration of digital power amplifiers able to manage their own spurious emissions (IEEE RFIC 2013) and WiFi/WiGig configurable transceivers.


Delta-sigma chip

Fig.1: Microphotograph of a delta-sigma digital RF transmitter designed in a 90nm CMOS process (4 x 0.8 mm²). This integrated circuit is able to generate RF signals using high-speed 1-bit digital output data streams with performance compatible with communication standards (IEEE JSSC OCt 2009)